搜索资源列表
RS232_tx
- 串口发送程序，verilog实现，可综合。-program for rs232
QUARTUS_WORK_FORTH
- 基于verilog语言的，FPGA程序实现电脑与FPGA串口的数字传输，硬件设备为EP1C3T100C8，usb转RS232芯片为FT232BM，-Based verilog language, FPGA program FPGA serial digital transmission of computer and hardware devices to EP1C3T100C8, usb to RS232 chip FT232BM,
uart_async
- RS232串口通信代码，采用verilog HDL实现，在quartus上仿真通过并下载到fpga平台功能验证-RS232 CODE
RS_232_2
- RS232串口通讯实验，verilog HDL，在quartusII开发环境下-RS232 serial communication experiment, verilog HDL, in quartusII development environment
fpga-nois
- 里面包含fpga的4个noic核 verilog(i2c,rs232,can,8051)。测试过不错-Which contains the four noic nuclear fpga verilog (i2c, rs232, can, 8051). Tested good
cetvrtak13
- 8通道示波器，采用DE2-115FPGA综合，带有RS232连接，VGA驱动，IR驱动。用verilog编写。-8-channel oscilloscope, using DE2-115FPGA integrated with RS232 connection, VGA driver, IR driver. Written in verilog.
lab-uart
- verilog RS232 讀取跟寫入和傳送資料-verilog RS232 with write and read data transfer
serial_1
- RS232 protocol written in verilog There s four parts : top_level frequency receive data transmit data
async_receiver
- 用于RS232串口接收数据的verilog语言，时钟速率可改，可直接调用。- ON划词翻译ON实时翻译 Serial port for receiving data of the Verilog language, can be called directly.
FPGA_51
- 51+FPGA架构的通讯口扩展,用verilog语言编写，扩展了Ｉ２Ｃ，ＳＰＩ，ＲＳ２３２。-51+ FPGA architectures communication port expansion, with verilog language, extends the I2C, SPI, RS232.
UART_FPGA_VerilogHDL
- FPGA RS232串口通信，Verilog HDL代码-FPGA RS232 serial communication, Verilog HDL code
verilog_receiver
- 标准的verilog rs232 接收功能通讯源码，测试可用，已经在实际系统开发中使用。-Standard verilog rs232 reception communications source, testing is available, have been used in the actual system development.
1---Serial-interface-(RS-232)
- Verilog HDL编写的RS232通信接口，包含RS232接口通信原理解析和编程实现文档-Verilog HDL prepared by the RS232 communication interface, including RS232 interface communication principles of parsing and programming documents
Uart
- FPGA verilog UART串口通信,可通过RS232串口与串口助手通信。-FPGA verilog UART communication, it could connect with UART assistor with RS232 port.
bldc_motor_control_design_example
- 无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA- actel VERILOG BLDC control of the use of actel FPGA
uart
- RS232接口，uart用verilog语言实现-RS232 interface, uart with verilog language
sheji2
- 基于Verilog的数字温度计，用DS18B20采集温度，通过RS232接口与计算机实现串行通信-Verilog-based digital thermometer with DS18B20 collecting temperature, serial communication interface with the computer via RS232
IIC
- IIC读写发送到PC串口的verilog源程序-IIC send the data to rs232 by pc
FPGA_SDRAM
- UART作为RS232协议的控制接口得到了广泛的应用，将UART的功能集成在FPGA芯片中，可使整个系统更为灵活、紧凑，减小整个电路的体积，提高系统的可靠性和稳定性。提出了一种基于FPGA的UART的实现方法，具体描述了发送、接收等模块的设计，恰当使用了有限状态机，实现了FPGA片上UART的设计，给出了仿真结果。-fpga verilog uart sram
rs232_auto
- verilog实现通过RS232自发自收，波特率为115200，传输格式为1位起始位，8位数据位，1位停止位，无校验位-verilog through RS232 spontaneous self-closing, 115200 baud rate, transmission format is one start bit, 8 data bits, 1 stop bit, no parity bit。